Low Power, Low Voltage, Low Drop-Out On-chip Voltage Regulator
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extremely low power, low voltage complete on-chip low drop-out voltage regulator (ldo) is presented. the ldo receives an unregulated supply of 0.5–1 v and regulates it to 0.4 v nominal output utilizing a 0.1 v on-chip reference voltage. a load capacitor of just 1pf is assumed to be present at ldo output. designed voltage reference and complete ldo were simulated in 180 nm cmos technology with variation in supply voltage and temperature. the maximum power dissipation of the complete ldo was found to be approximately 3nw and maximum line and load regulations were observed to be 6.62 mv/v and 8.08 mv/ma, respectively.
KeywordsLDO On-chip Regulation PM BW UGB
- 1.den Besten, G.W., Nauta, B.: Embedded 5 V-to-3.3 V voltage regulator for supplying Digital IC’s in 3.3 V technology. IEEE J. Solid-State Circ. 33(7), 956–962 (1998)
- 2.Milliken, R.J., Silva-Martinez, J., Sánchez-Sinencio, E.:. Full on-chip CMOS low-dropout voltage regulator. IEEE Trans. Circ. Syst. I Reg Pap 54(9), 1879–1890 (2007)
- 3.Okuma, Y., et al.: 0.5-V input digital LDO with 98.7% current efficiency and 2.7-μA quiescent current in 65 nm CMOS. In: IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, 2010, pp. 1–4.
- 4.Yang, F., Mok, P.K.T.: A 65 nm inverter-based low-dropout regulator with rail-to-rail regulation and over −20 dB PSR at 0.2 V lowest supply voltage. IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Pap 106–107 (2017)
- 5.Huang, M., Lu, Y., Seng-Pan, U., Martins, R.P.: An analog-assisted tri-loop digital low-dropout regulator. IEEE J. Solid-State Circ. 53(1), 20–34, (2018).
- 6.Lam, Y.H., Ki, W.H.: A 0.9 V 0.35 um adaptively biased CMOS LDO regulator with fast transient response. IEEE Int. Solid-State Circ. Conf. 442–443, (2008)
- 7.Nasir, S.B., Gangopadhyay, S., Raychowdhury, A.: All-digital low-dropout regulator with adaptive control and reduced dynamic stability for digital load circuits. IEEE Trans. Power Electron. 31(12), 8293–8302 (2016)
- 8.Seok, M.: Fully integrated low-drop-out regulator based on event driven PI control. IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Pap. 148–149 (2016)
- 9.Salem, L.G., Warchall, J., Mercier, P.P.: A 100 nA-to-2 mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1 ns response time at 0.5 V. IEEE Int. Solid-State Circ. Conf. (ISSCC) Dig. Tech. Pap. 340–341 (2017)