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Low Power, Low Voltage, Low Drop-Out On-chip Voltage Regulator

  • Gopal AgarwalEmail author
  • Ved Vyas Dwivedi
Conference paper
  • 36 Downloads
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 1162)

Abstract

extremely low power, low voltage complete on-chip low drop-out voltage regulator (ldo) is presented. the ldo receives an unregulated supply of 0.5–1 v and regulates it to 0.4 v nominal output utilizing a 0.1 v on-chip reference voltage. a load capacitor of just 1pf is assumed to be present at ldo output. designed voltage reference and complete ldo were simulated in 180 nm cmos technology with variation in supply voltage and temperature. the maximum power dissipation of the complete ldo was found to be approximately 3nw and maximum line and load regulations were observed to be 6.62 mv/v and 8.08 mv/ma, respectively.

Keywords

LDO On-chip Regulation PM BW UGB 

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Copyright information

© Springer Nature Singapore Pte Ltd. 2021

Authors and Affiliations

  1. 1.Research Scholar, C U Shah UniversitySurendranagarIndia
  2. 2.Professor, E and C DepartmentC U Shah UniversitySurendranagarIndia

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